1. Field of the Invention
The present invention relates to a gate turn-off thyristor. More specifically, the present invention relates to a gate turn-off thyristor capable of interrupting a large anode current in a short period of time.
2. Description of the Prior Art
A gate turn-off thyristor has been proposed and put into practical use as a semiconductor device capable of performing a switching function, i.e. capable of turning on or off a current in response to a gate signal. Of late, such gate turn-off thyristors came to be highlighted as a new power semiconductor device and such a device that can turn off an anode current as large as 2500A has been developed.
FIG. 1 is a sectional view showing one example of a layered structure of a conventional gate turn-off thyristor. The gate turn-off thyristor comprises a four-layered structure having a P-type emitter layer 1, an N-type base layer 2, a P-type base layer 3 and an N-type emitter layer 4, formed in succession on one another from the lowermost layer. However, the N-type emitter layer 4 is divided into a plurality of regions in a planar manner and the surface of the P-type base layer 3 is formed with P.sup.+ layer regions 5 for providing ohmic contact. An anode electrode 6 is formed on the surface of the P-type emitter layer 1 and cathode electrodes 7 are formed on the surface of the N-type emitter layer and then gate electrodes 8 are formed on the surface of the P.sup.+ layer regions of the P-type base for controlling current.
FIG. 2 is an enlarged view showing the current flowing through the P-type base layer 3 while the gate turn-off thyristor shown in FIG. 1 is being turned off, wherein the current flows along the arrow lines.
FIG. 3 is a graph showing mutual relation of the respective time dependent changes of interruption anode current (I.sub.TGQ), forward voltage (V.sub.D) and gate current I.sub.GQ) of the gate turn-off thyristor. In the figure, the ordinate indicates the current or the voltage and the abscissa indicates the time, wherein t.sub.gq corresponds to a turn-off time. The anode current flows to the gate electrodes 8, as shown in FIG. 2, on the occasion of the interruption, and thus the carriers in the P-type base layer 3 are gradually extracted with the current to the gate electrode, thereby to narrow the region in a conduction state, so that the thyristor may be turned off ultimately. However, while the anode current is being turned off, the current is concentrated in the gradually narrowed region in a conduction state, with the result that thermal destruction or the like could occur in the narrowed region in a conduction state. Hence, it is desired that an approach is considered to extract efficiently and quickly the carriers in the above described P-type base layer 3. To that end, approaches can be thought of wherein the width L of every N-type emitter layer region is made narrow or the impurity concentration of the P-type base layer 3 is increased as much as possible. Although an ordinary gate turn-off thyristor is structured such that the width L of every N-type emitter layer region 4 is selected to be as narrow as several 100 .mu.m, it is necessary that the width L is selected to be much narrower in a case where a larger anode current is to be gate turned off. However, when the width L of the N-type emitter layer region 4 is selected to be narrower, problems arise in that the cathode area is decreased, the manufacture becomes difficult, the yield rate is decreased and the like. When the impurity concentration of the whole P-type base layer 3 is increased, injection efficiency of the carriers from the N-type emitter layer region 4 to the P-type base layer 3 is gradually decreased, whereby a current amplification factor .alpha..sub.NPN of an NPN transistor comprised of the N-type emitter layer region 4, the P-type base layer 3, and the N-type base layer 2 is decreased as the impurity concentration of the P-type base layer 3 is increased.
Meanwhile, as is well known, in order that a gate turn-off thyristor may be turned on from a forward directional block state, the sum of the above described current amplification factor .alpha..sub.NPN of the NPN transistor and the current amplification factor .alpha..sub.PNP of the PNP transistor comprised of the P-type base layer 3, the N-type base layer 2 and the P-type emitter layer 1 need be larger than the unity. If the impurity concentration of the P-type base layer 3 is increased too much, the above described conditions come not to be met, with the result that the gate turn-off thyristor does not perform a function of turn on. Accordingly, the impurity concentration of the P-type base layer 3 cannot be increased more than a certain value.
Since a conventional gate turn-off thyristor was structured in the above described manner, disadvantages were involved that the turn off time period is so long that the thyristor cannot be used as a high frequency inverter while an interruption anode current is small.